1. Field of the Invention
The present invention relates to an oscillator.
2. Description of the Related Art
One of the methods employed in digital phase-locked loop (PLL) circuits is to select the optimum pulse from generated multiple phases of clock signals and use it as an output signal of the PLL circuit. In this case, if a difference arises in the phase differences between clock signals forming the multiple phases of clock signals, jitter of the output signal ends up increasing in accordance with the magnitude of the difference. Therefore, it is demanded that the phase difference be made constant with a high precision.
Further, processing for the selection is realized by a digital circuit, but when the number of phases of the multi-phase clock signals is an odd number, the arithmetic operations to be executed in the digital circuit become complex, so a processing circuit having a large circuit size is considered needed.
On the other hand, there is a ring oscillator used as a general clock signal generation circuit. The ring oscillator is comprised of an odd number of inverters connected in a ring. If connecting an even number of inverters in a ring at this time, the circuit becomes stable as a whole in state, so there is no oscillation. The number of phases of the multiple phases of clock signals obtained in a ring oscillator comprised of an odd number of inverters connected as described above is an odd number, and the phase difference between clock signals output from each inverter becomes one period of the odd number.
Here, Japanese Unexamined Patent Publication (Kokai) No. 6-216721 and Japanese Unexamined Patent Publication (Kokai) No. 7-283697 disclose oscillators each generating a plurality of signals having a phase difference of one period of the even number. However, these oscillators do not have symmetry in circuit configuration. At the same time, the number of pulses transmitted between devices forming the oscillators becomes one or two per unit period. From this, there is the problem that power supply noise is generated by fluctuation of the consumed current for every period in the oscillator, so a difference occurs in the phase difference between clock signals forming the multiple phases of clock signals.
By configuring the inverters as differential circuits, oscillation is also possible in a state with an even number of inverters connected. However, a ring oscillator using inverters as components is large in circuit size.